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Electronic design automation
Results: 1598

#	Item
641	How to Speed Signoff Extraction by 5X with Next-Generation Extraction Tool Tool Contributes to Faster Overall Design Closure By Hitendra Divecha, Cadence Design Systems Parasitic extraction, particularly in the digital Add to Reading List Source URL: www.cadence.com Language: English - Date: 2014-07-14 20:06:15 Integrated circuits Electronic design Parasitic extraction Signoff Application-specific integrated circuit Standard cell Process corners Engineering Change Order Cadence Design Systems Electronic engineering Electronic design automation Electronics
642	The Effects of Bounding Syntactic Resources on Presburger LTL ∗ St´ephane Demri LSV, ENS Cachan CNRS, INRIA Saclay [removed] Add to Reading List Source URL: www.lsv.ens-cachan.fr Language: English - Date: 2009-06-18 03:59:48 Automata theory Logic in computer science Model theory Complexity classes Electronic design automation Satisfiability FO Boolean satisfiability problem Constraint automaton Theoretical computer science Mathematical logic Mathematics
643	Microsoft Word - NAVIGATIONAL TOOLS.doc Add to Reading List Source URL: www.aapm.org Language: English - Date: 2006-02-01 16:49:22 Floorplan Technical drawing Floor plan Electronics Electrical engineering Visual arts Combinatorial optimization Electronic design automation Electronic engineering
644	Investigation into intermodulation distortion in HEMTs using a quasi-2-D physical model Add to Reading List Source URL: eprints.whiterose.ac.uk Language: English - Date: 2014-06-04 07:59:15 Electronic design automation Transistor High electron mobility transistor Microwave Gain compression Intermodulation Channel Signal integrity Distortion Electronic engineering Electronics Electromagnetism
645	metaSMT: A Unified Interface to SMT-LIB2 Heinz Riener1 Mathias Soeken1,2 Clemens Werther1 Add to Reading List Source URL: www.informatik.uni-bremen.de Language: English - Date: 2014-07-29 13:06:58 Electronic design automation Formal methods Logic in computer science Constraint programming Satisfiability Modulo Theories Solver Boolean satisfiability problem Timeout Transmission Control Protocol Theoretical computer science Applied mathematics NP-complete problems
646	metaSMT: Focus On Your Application Not On Solver Integration Finn Haedicke, Stefan Frehse, Görschwin Fey, Daniel Große, Rolf Drechsler Group of Computer Architecture, University of Bremen, Germany Add to Reading List Source URL: www.informatik.uni-bremen.de Language: English - Date: 2014-02-05 05:31:31 Logic in computer science Electronic design automation NP-complete problems Constraint programming Satisfiability Modulo Theories Valuation Integer factorization Theoretical computer science Applied mathematics Formal methods
647	As Simple As Possible, But No Simpler: A Gentle Introduction to Simulation Modeling Add to Reading List Source URL: www.informs-sim.org Language: English - Date: 2006-11-08 11:59:34 Electronic engineering Electronic design automation Operations research Markov models Stochastic processes Discrete event simulation Computer simulation Simulation language Simulation software Statistics Scientific modeling Science
648	Manifesto from Dagstuhl Perspectives Workshop[removed]Modeling, Analysis, and Verification – The Formal Methods Manifesto 2010 Edited by Add to Reading List Source URL: drops.dagstuhl.de Language: English - Date: 2011-09-30 04:09:55 Software development Formal verification Model checking Formal specification Electronic design automation Specification language Verification and validation Software development process Programming language Formal methods Theoretical computer science Science
649	VHDL Workshop Course Description This three-day class is a general introduction to the VHDL language and its use in programmable logic design. The emphasis is on the synthesis constructs Add to Reading List Source URL: www.elca.de Language: English - Date: 2014-02-19 09:48:54 Electronic design automation Logic design VHDL Altera Quartus Logic synthesis Mentor Graphics Electronic engineering Digital electronics Hardware description languages
650	How to Achieve 10X Faster Power Integrity Analysis and Signoff By Jerry Zhao, Product Director, Cadence In our mobile computing era, system-on-chip (SoC) design has become much more complex, with challenges from complex Add to Reading List Source URL: www.cadence.com Language: English - Date: 2013-11-12 08:14:34 Integrated circuits Digital electronics Signoff Design closure Timing closure Power network design Integrated circuit design Application-specific integrated circuit Design rule checking Electronic engineering Electronic design automation Electronic design

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